The invention relates to a method of manufacturing a semiconductor device, in which a depression in a surface of a semiconductor substrate is filled by covering it with a preplanarized filling layer and a further planarization layer, after which the substrate is brought into contact with an etchant, in which the planarization layer and the preplanarized filling layer are etched at substantially the same rate.
The depression in the surface of the semiconductor substrate may be a groove etched into the substrate, but may also be a space located between conductor tracks (for example of aluminium or of polycrystalline silicon) disposed on the substrate, or it may be a window provided in an isolating layer. The etching treatment with the etchant in which the planarization layer and the preplanarized filling layer are etched at practically the same rate, can be stopped at different instants. It may be stopped, for example, at the instant at which the surface of the semiconductor substrate is reached; the depression is then filled, while no filling material is present on the surface beside the depression. Thus, for example, grooves in a silicon surface may be filled with isolating material. Alternatively, a conductor, such as, for example, aluminium, may thus be provided in grooves or in windows in an isolating layer. The etching treatment may also be stopped before the surface of the semiconductor substrate is reached; the depression is then filled, while a layer of the filling material is also present on the surface beside the depression. Thus, for example, conductor tracks may be packed in isolating material. In all these cases, a semiconductor device having a flat planarized construction is obtained.
A method of the kind mentioned in the opening paragraph is known from IBM-TDB, Vol. 25, No. 11 B, 1983, pp. 6129-30, in which a groove in a silicon surface is filled with silicon oxide. The preplanarized filling layer is formed in this case in two processing steps. First the surface is covered with a first silicon oxide layer. Then a photoresist mask is provided at the area of the depression. Subsequently, the part of the first silicon oxide layer not covered with the photoresist mask is etched away. The silicon surface beside the groove is fully exposed. Also silicon oxide is removed from the groove, silicon also being exposed in an edge of the groove. After this etching treatment, the photoresist mask is removed and the surface is covered with a second layer of silicon oxide. Thus, the depression in the surface of the semiconductor substrate is filled with a comparatively flat preplanarized layer. Due to the second silicon oxide layer, not the whole groove, but only the edge thereof need be filled, at which during the etching treatment silicon oxide of the first layer was etched away. Since now considerably smaller spaces have to be filled, the second silicon oxide layer has comparatively flat surface.
Besides the fact that in the known method described two depositions of silicon oxide are required, this method has further the disadvantage that during the second deposition the very small spaces at the edge of the depression have to be filled. In order to avoid that cavities are formed in the layer, a deposition process has to be used with a very good step coverage or a silicon oxide layer must be provided which liquefies during a heat treatment then additionally to be carried out, any cavities present then disappearing. In the last-mentioned case, the silicon oxide must contain a comparatively large amount of additions, such as boron or phosphorus. This may be very objectionable because during the heat treatment for liquefying the silicon oxide layer this addition can diffuse into the underlying and adjacent silicon. Semiconductor zones doped in an undesired manner can then be formed in the silicon or zones already present therein can assume undesired properties.
The invention has inter alia for its object to obviate these disadvantages.